Idive drive background code#

We verified that dopant diffusion is strongly affected by a direct donor–acceptor interaction, and that good prediction of the experimental results can only be obtained using a simulation code which takes into account the formation of neutral, near immobile, Sb–B pairs. This procedure allows us to obtain very shallow junctions even after annealings with relatively high thermal budget, like 800 ☌/8 h or 900 ☌/1 h, or 950 ☌/10 min or 1000 ☌/60 s. Furthermore, both the transient enhanced diffusion, being the B implanted in a preamorphized layer, and the standard diffusion, due to the pairing between donors and acceptors, are strongly reduced. The preamorphization with Sb avoids the B channeling and increases the n-type doping in the junction region, thus confining the depth of the p layer. The junctions are prepared by implanting Sb and subsequently BF2, at a higher dose, in an n-type Si substrate. In this article we investigate the B and Sb codiffusion upon postimplantation annealing in order to fabricate very shallow p+/n junctions (⩽70 nm), suitable for a complementary metal–oxide–semiconductor technology with a channel length of 0.18 μm. Redistribution behaviors of antimonyrelating to the pileup and the precipitation are discussed utilizing SIMS (SecondaryIon Mass Spectrometry ) depth profiles.

However, increase in anti- monyconcentration above 1 × 1020 cm−3 gives rise to precipita- tion and it limits the sheet resistance reduction of the antimony doped junctions. These results indicate that antimonyis superior to arsenic as a dopant for ultra shallow extension formation. was obtained for a 24 nm depth junction with antimony. As a result, low sheet resistance of 260 Ω/sq. Though implanted arsenic gives rise to pileup even with a few seconds duration RTA (Rapid Thermal Annealing), antimonypileup was suppressed with the RTA at relativelylow temperature, such as 800◦C or 900◦C.

The pileup at the Si/SiO2 interface and the result- ing dopant loss during annealing is a common obstacle for anti- monyand arsenic to reduce junction sheet resistance. SUMMARY Ultra shallow low-resistive junction formation has been investigated for sub-100-nm MOSFETs using antimony implantation. Idrive and Lgmin is observed in the nMOS devices Sb pre- amorphization cases, no significant improvement in either Leakage increases with Sb implant energy and dose. (4) In contrast to the Lgmin of a pMOS, the junctionĭiode leakage is sensitive to the Sb implant condition. Lgmin is observed for different annealing temperatures Pocket implant doping for either case studied. (3) The Sb implant conditions do not form an effective Pre-amorphization, which resulted in a higher Rsd and thusĭegraded the drive current to Idrive(strong) equals 185 (mu)Ī/micrometers. Thicker than the thin one) had to be used for a device without the The same Lgmin requirement, a thick 1st spacer (150 angstroms With a thin 1st spacer and with Sb pre-amorphization in this study. Lgmin equals approximately 0.16 micrometers were obtained Idrive(strong) equals 211 (mu) A/micrometers at Lgmin equals approximately 0.16 micrometers, a p-channel These improvements are due to the formation of a more shallow and abrupt Sb pre-amorphization when the same thickness of the 1st spacer was used. Reduction in Lgmin (from approximately 0.16 micrometers toĪpproximately 0.14 micrometers ) were observed for the pMOS devices with InA/micrometers at supplying voltage of 1.5 V and toxĪpproximately equals 39 angstroms) and approximately 0.02 micrometers Idrive(strong) (from 185 (mu) A/micrometers to 193 (mu)Ī/micrometers the drive current at Ioff equals The key results are as follows: (1) A 4% improvement in Temperatures were also used to study their effect on the drive current. TEOS 1st spacer in different thickness and various final RTA

These characteristics will also beĬompared with those obtained from devices without the pre-amorphization. InA/micrometers at Vg EQ 0, Vd equals 1.5 V),Įquals 1.5 V), and diode leakage. Such as Lgmin (the gate length at Ioff equals To study their effects on pMOS and nMOS characteristics, respectively, Paper, different Sb and In implantation conditions (various implantĮnergies and doses) were used before BF2 and As HDD implant Source/drain extension for deep sub-micron CMOS technology. Pre-amorphization scheme has been widely used to form shallow

Idive drive background